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| IPD80N04S3-06 OptiMOS(R)-T Power-Transistor Product Summary V DS R DS(on),max ID 40 5.2 90 V m A Features * N-channel - Enhancement mode * Automotive AEC Q101 qualified * MSL1 up to 260C peak reflow * 175C operating temperature * Green package (RoHS compliant) * 100% Avalanche tested PG-TO252-3-11 Type IPD80N04S3-06 Package PG-TO252-3-11 Marking QN0406 Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol ID Conditions T C=25C, V GS=10V1) T C=100 C, V GS=10 V2) Pulsed drain current2) Avalanche energy, single pulse Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 I D,pulse E AS V GS P tot T j, T stg T C=25 C T C=25 C I D=80 A Value 90 71 320 125 20 100 -55 ... +175 55/175/56 mJ V W C Unit A Rev. 1.0 page 1 2007-07-09 IPD80N04S3-06 Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics2) Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area3) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D= 1 mA V GS(th) I DSS V DS=V GS, I D=52 A V DS=40 V, V GS=0 V, T j=25 C V DS=40 V, V GS=0 V, T j=125 C2) Gate-source leakage current Drain-source on-state resistance I GSS RDS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=80 A 40 2.1 3.0 4.0 1 A V 1.5 62 40 K/W - 4.1 100 100 5.2 nA m Rev. 1.0 page 2 2007-07-09 IPD80N04S3-06 Parameter Symbol Conditions min. Values typ. max. Unit Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current2) Diode pulse current2) Diode forward voltage IS I S,pulse V SD T C=25 C V GS=0 V, I F=80 A, T j=25 C V R=20 V, I F=I S, di F/dt =100 A/s 1 80 320 1.3 V A Q gs Q gd Qg V plateau V DD=32 V, I D=80 A, V GS=0 to 10 V 15 9 36 6.0 20 16 47 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=20 V, V GS=10 V, I D=80 A, R G=6 V GS=0 V, V DS=25 V, f =1 MHz 2500 660 100 15 10 20 10 3250 860 150 ns pF Reverse recovery time2) t rr - 34 - ns Reverse recovery charge2) 1) Q rr - 36 - nC Current is limited by bondwire; with an R thJC = 1.5K/W the chip is able to carry 101A at 25C. For detailed information see Application Note ANPS071E at www.infineon.com/optimos 2) 3) Defined by design. Not subject to production test. Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2007-07-09 IPD80N04S3-06 1 Power dissipation P tot = f(T C); V GS 6 V 2 Drain current I D = f(T C); V GS 6 V 120 100 100 80 80 60 P tot [W] 60 I D [A] 40 20 0 0 50 100 150 200 0 50 100 150 200 40 20 0 T C [C] T C [C] 3 Safe operating area I D = f(V DS); T C = 25 C; D = 0 parameter: t p 1000 4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T 101 1 s 10 s 100 s 100 0.5 100 1 ms Z thJC [K/W] 0.1 I D [A] 10-1 0.05 0.01 10 10-2 single pulse 1 0.1 1 10 100 10-3 10-6 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 1.0 page 4 2007-07-09 IPD80N04S3-06 5 Typ. output characteristics I D = f(V DS); T j = 25 C parameter: V GS 200 10 V 6 Typ. drain-source on-state resistance R DS(on) = f(I D); T j = 25 C parameter: V GS 20 18 16 14 5.5 V 6V 6.5 V 7V 160 R DS(on) [m] 120 6.5 V I D [A] 12 10 8 80 6V 40 5.5 V 6 4 2 7V 5V 10 V 0 0 2 4 6 8 0 20 40 60 80 100 120 V DS [V] I D [A] 7 Typ. transfer characteristics I D = f(V GS); V DS = 6V parameter: T j 320 -55 C 8 Typ. drain-source on-state resistance R DS(on) = f(T j); I D = 80 A; V GS = 10 V 9 280 240 200 25 C 8 7 R DS(on) [m] 8 I D [A] 175 C 6 160 120 80 40 0 2 3 4 5 6 7 5 4 3 2 -60 -20 20 60 100 140 180 V GS [V] T j [C] Rev. 1.0 page 5 2007-07-09 IPD80N04S3-06 9 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D 4 10 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz 104 3.5 3 V GS(th) [V] 52 A C [pF] 520 A Ciss 2.5 103 Coss 2 1.5 1 -60 -20 20 60 100 140 180 102 0 5 10 15 20 25 Crss 30 T j [C] V DS [V] 11 Typical forward diode characteristicis IF = f(VSD) parameter: T j 103 12 Typ. avalanche characteristics I A S= f(t AV) parameter: T j(start) 100 150 C 25 C 100 C 102 I AV [A] 101 175 C 25 C I F [A] 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1 1 10 100 1000 V SD [V] t AV [s] Rev. 1.0 page 6 2007-07-09 IPD80N04S3-06 13 Typical avalanche energy E AS = f(T j) parameter: I D 600 14 Typ. drain-source breakdown voltage V BR(DSS) = f(T j); I D = 1 mA 55 500 50 20 A 400 300 V BR(DSS) [V] 40 A 80 A 45 E AS [mJ] 40 200 35 100 0 25 75 125 175 30 -60 -20 20 60 100 140 180 T j [C] T j [C] 15 Typ. gate charge V GS = f(Q gate); I D = 80 A pulsed parameter: V DD 12 8V 32 V 16 Gate charge waveforms V GS Qg 10 8 V GS [V] 6 V g s(th) 4 2 Q g (th) Q gs 0 10 20 30 40 Q sw Q gd Q gate 0 Q gate [nC] Rev. 1.0 page 7 2007-07-09 IPD80N04S3-06 Published by Infineon Technologies AG 81726 Munich, Germany (c) Infineon Technologies AG 2007 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of noninfringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2007-07-09 IPD80N04S3-06 Revision History Version Date Changes Rev. 1.0 page 9 2007-07-09 |
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